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SN65LVDS104PW
+Lista de MateriaisIC MULTIPLEXER 1CH 16TSSOP
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FabricanteTexas Instruments
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Peça do Fabricante #SN65LVDS104PW
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Ficha Técnica SN65LVDS104PW DataSheet
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Especificações
| Atributo | Valor |
| Supplier | Texas Instruments |
| Package | Tube |
| ProductStatus | Active |
| Type | Buffer, Multiplexer |
| Input | LVDS |
| Output | LVDS |
| DataRate(Max) | 400Mbps |
| NumberofChannels | 1 x 1:4 |
| DelayTime | 3.1ns |
| Capacitance-Input | 3 pF |
| Voltage-Supply | 3V ~ 3.6V |
| Current-Supply | 23mA |
| OperatingTemperature | -40°C ~ 85°C |
| MountingType | Surface Mount |
| Package/Case | 16-TSSOP (0.173, 4.40mm Width) |
Visão Geral
Description
Key points:
- 4 LVDS channels, 2:1 per channel
- 100-ohm differential I/O; single-supply operation in the LVDS range (typical 2.7–3.6 V)
- Low skew, high-speed LVDS signaling
- Tri-state outputs for bus sharing; ESD protection on I/O
- Packaged in PW (plastic) package
Typical uses include video/data distribution, LCD panel backplanes, high-speed interconnects, and test/flexible routing where multiple LVDS paths must be reconfigured quickly. For exact electrical specs, timing, and pinout, see the TI datasheet.
Features
- Quad LVDS line driver with four differential channels
- 100-ohm differential output impedance per channel
- 3.3V supply operation; low-power design
- Enable/disable control for outputs (three-state capability)
- ESD protection on I/O pins; robust to upsets
- Extended temperature range: −40°C to +85°C
- Pb-free PW package
Note: for exact specifications, always consult the TI datasheet.
Pinout
Function: Quad LVDS receiver. It accepts four LVDS differential input pairs and converts them to four CMOS/TTL-level outputs (with Vcc/Gnd and an enable/controls as per the device).
Manufacturer
- What kind of company: American multinational semiconductor company that designs and manufactures analog, mixed-signal, and digital integrated circuits.
Application
- TFT/LCD panel data interfaces: LVDS video data paths between controller and panel (multi-channel).
- High-speed data links: FPGA/ASIC to sensors, serializers/deserializers, or other peripherals.
- LVDS backplane and multi-channel interconnects in displays, monitors, and broadcast equipment.
- Instrumentation and test equipment requiring multiple simultaneous LVDS channels.
- General multi-channel LVDS data routing and distribution on complex PCBs.